At issue is the construction of disputed terms used in 15 patents descending from a single patent application, U.S. Patent Appl. No. 07/510,898 ("the '898 application"). Defendant Rambus Inc. and plaintiffs Hynix Semiconductor Inc., Hynix Semiconductor America Inc., Hynix Semiconductor U.K. Ltd., and Hynix Semiconductor Deutschland Gmbh ("Hynix") briefed the issues and presented evidence at a claim construction hearing on March 23, 2004. The court has read the moving and responding papers, including the patents-in-suit and the relevant prosecution history, considered the arguments of counsel, and now construes the disputed terms in the claims.
Rambus is the assignee of several patents covering Synchronous Dynamic Random Access Memory ("SDRAM") chips and related interface and memory control technology. Second Am. Compl. ¶ 10. In the vast majority of computers, Dynamic Random Access Memory ("DRAM") serves as the main memory for temporary storage of data currently being utilized by the Central Processing Unit ("CPU" or "processor"). In contrast to a hard drive, which permits long-term "non-volatile" storage, DRAMs do not retain information written to them once the computer is turned off.*fn1 Information on a hard drive, however, must be transferred to a main memory composed of DRAM before it can be accessed by the CPU. Thus, in most computers, a main memory composed of DRAM is the principal storage location for computer programs that are running at a given time, along with the data on which the programs operate.
DRAMs are generally arranged in two-dimensional arrays of memory cells designated by rows and columns. Exactly one bit of information is stored at each row-column intersection. An individual datum stored in the array is accessed by supplying the DRAM with the row and column address corresponding to the location of the memory cell to be accessed. Control information instructs the DRAM on what operation is to be performed. Basic operations include read accesses, where data is retrieved from the DRAM cells, and write operations, where data is written to selected cells.
The patented inventions deal with computer memory devices called Synchronous DRAM ("SDRAM"). SDRAM is a type of memory designed to improve the speed and efficiency of data transfers to and from devices that access the memory. In most operational circumstances, when appropriately designed for use in a general purpose computer, SDRAM devices provide a performance advantage over earlier DRAM devices. The initial Rambus application was the '898 application filed on April 18, 1990. Rambus asserts that the SDRAM patents are entitled to that date as their effective filing date. Rambus claims patents for "the interface circuitry that connects DRAMs to the CPUs with which they communicate and that connects them to the overall systems in which they reside." Def.'s Opening Claim Const. Br. ("CC Brief") at 3. Rambus claims eleven distinct groups of inventions stemming from the '898 application. Each of these claimed inventions addresses a "memory bottleneck" problem, where a busmaster*fn2 normally has to wait for data to be available for transfer to or from the DRAM.*fn3 Specifically, Rambus contends that by using its invention, DRAMs are able to provide data to a busmaster as fast as that processor can process it, thus keeping pace with the ever-increasing speed of CPUs. Each patent in suit describes the same field of invention:
An integrated circuit bus interface for computer and video systems . . . which allows high speed transfer of blocks of data, particularly to and from memory devices, with reduced power consumption and increased system reliability. A new method of physically implementing the bus architecture is also described.
U.S. Patent No. 5,953,263 ("the '263 patent"), col. 1, ll. 9-15.*fn4
In the 1990's, the Joint Electronic Devices Engineering Council ("JEDEC") coordinated the development of technology standards for SDRAM chips. Second Am. Compl. ¶ 12. Plaintiff alleges, inter alia, that as a member of JEDEC, Rambus used information gained from the standards-setting process to secretly and fraudulently secure the patents at issue ("SDRAM patents"), and, therefore, market power. Plaintiff further alleges that these actions were taken in violation of JEDEC's rules and various federal and state laws. Second Am. Compl. ¶¶ 11-13.*fn5
Certain terms in the same family of disputed patents have already been construed by the Eastern District of Virginia in Rambus, Inc. v. Infineon Techs. AG, 2001 WL 34138091 (E.D. Va. 2001) ("Infineon I"). Specifically, the terms "bus," "block size information," "read request," "write request," "transaction request," "first external clock signal," "second external clock signal" and "integrated circuit device" were construed in Infineon I. The district court in Infineon I granted summary judgment of non-infringement for Infineon, entered judgment on a jury verdict of fraud under Virginia state law for conduct occurring during JEDEC SDRAM standardization proceedings, and granted judgment as a matter of law in favor of Rambus, overturning a jury verdict of fraud committed during consideration of DDR-SDRAM standards.*fn6 Rambus, inter alia, appealed the district court's claim construction of the terms "integrated circuit device," "read request," "write request," "transaction request," and "bus." See Rambus, Inc. v. Infineon Techs. AG, 318 F.3d 1081, 1088 (Fed. Cir. 2003) ("Infineon II"). The Federal Circuit reversed the district court and disagreed with the district court's construction of each of these terms, vacated the judgment of noninfringement, vacated the jury's SDRAM fraud verdict, and remanded for further proceedings under the revised claim construction. See id. at 1106. Of these terms, the parties dispute only the proper construction of "integrated circuit device."
On November 21, 2001 this court granted plaintiff's motion for partial summary judgment of noninfringement with respect to twenty-seven claims from the patents-in-suit. In its November 2001 order, the court concluded that the doctrine of collateral estoppel barred Rambus from re-litigating claim construction and infringement of certain representative claims of the patents-in-suit. The court's earlier order was based on the claim construction and judgment of non-infringement entered against Rambus in Infineon I. In light of the Federal Circuit's January 29, 2003 order reversing Infineon I's construction of certain terms in the asserted claims, the court on July 25, 2003 vacated in its entirety the November 21, 2001 order.
The construction of patent claim terms is a matter of law for the court. Markman v. Westview Instruments, Inc., 517 U.S. 370, 372 (1996) ("Markman II"). As the language of the claim defines the scope of the claim, claim construction analysis begins with the words of the claim. Teleflex, Inc. v. Ficosa N. Am. Corp., 299 F.3d 1313, 1324 (Fed. Cir. 2002); ASM Am., Inc. v. Genus, Inc., 260 F. Supp. 2d 827, 831 (N.D. Cal. 2002). "As a general rule, claim language carries the meaning of the words in their normal usage in the field of the invention." Infineon II, 318 F.3d at 1088 (citing Toro Co. v. White Consol. Indus., Inc., 199 F.3d 1295, 1299 (Fed. Cir. 1999)). In other words, claim language is construed to mean "what one of ordinary skill in the art at the time of the invention would have understood the term to mean." Id. (quoting Markman v. Westview Instruments, Inc., 52 F.3d 967, 986 (Fed. Cir. 1995) ("Markman I")).
However, where the intrinsic evidence shows that the specification uses the words in a manner clearly inconsistent with their ordinary meaning, the ordinary meaning must be rejected. See Tex. Digital Sys., Inc. v. Telegenix, Inc., 308 F.3d 1193, 1204 (Fed. Cir. 2002). In short, "inventors may act as their own lexicographers and use the specification to supply implicitly or explicitly new meanings for claim terms." Infineon II, 318 F.3d at 1088. Nevertheless, where a patentee has elected to be a lexicographer by providing a definition in the specification for a claim term, the patentee's lexicography must appear "with reasonable clarity, deliberateness, and precision." Renishaw PLC v. Marposs Societa' Per Azioni, 158 F.3d 1243, 1249 (Fed. Cir. 1998) (quoting In re Paulsen, 30 F.3d 1475, 1480 (Fed. Cir. 1994)). If the patentee provides such a clear definition, reference to the written description is required, "because only there is the claim term defined as it is used by the patentee." Id. Thus, claim construction is guided by two fundamental, sometimes conflicting, canons: "(a) one may not read a limitation into a claim from the written description, but (b) one may look to the written description to define a term already in a claim limitation, for a claim must be read in view of the specification of which it is a part." Renishaw, 158 F.3d at 1248 (citing Vitronics Corp. v. Conceptronic, Inc., 90 F.3d 1576, 1582 (Fed. Cir. 1996)); Markman I, 52 F.3d at 979-80.
Notably, "it is manifest that a claim must explicitly recite a term in need of definition before a definition may enter the claim from the written description." Renishaw, 158 F.3d at 1248. "The intrinsic evidence, and, in some cases, the extrinsic evidence, can shed light on the meaning of the terms recited in a claim, either by confirming the ordinary meaning of the claim terms or by providing special meaning for claim terms." Id. (citing Vitronics, 90 F.3d at 1583).
Consulting the written description and prosecution history prior to ascertaining the ordinary meaning "invites a violation of our precedent counseling against importing limitations into the claims." Texas Digital, 308 F.3d at 1204 (citations omitted). Rather, the full breadth of the limitations intended by the inventor will be more accurately guided by examining relevant dictionaries, encyclopedias and treatises "publicly available at the time the patent is issued . . . ." Id. at 1203. "Such references are unbiased reflections of common understanding not influenced by expert testimony or events subsequent to the fixing of the intrinsic record by the grant of the patent, not colored by the motives [of] the parties, and not inspired by litigation." Id. Examining these references together with the intrinsic evidence allows a court to construe terms more consistently with the inventor's use of the terms, more accurately determine the full breadth of the limitations, and avoid the improper importation of unintended limitations from the written description into the claims. Id. at 1205.
Since the Federal Circuit has already construed certain claim terms, these constructions are done as a matter of law and are given stare decisis effect. See Markman II, 417 U.S. at 390; Cybor Corp. v. FAS Tech., Inc., 138 F.3d 1448, 1455 (Fed. Cir. 1998) (noting that in Markman II "the Supreme Court endorsed this court's role in providing national uniformity to the construction of a patent claim."); Key Pharm. v. Hercon Labs. Corp., 161 F.3d 709, 716 (Fed. Cir. 1998).
a. Proposed constructions
Hynix asserts that "device" should be construed as "[e]lectronic circuits or components physically connected in a unit, with an interface to a bus having a multiplexed set of signal lines used to transmit substantially all address, data, and control information, and containing substantially fewer lines than the number of bits in a single address." Hynix contends that the definition of "device" is a common denominator in several terms, and, therefore, should be separately defined and incorporated into each of the asserted claims.
Rambus counters that "device," by itself, is not a proper term for construction. Specifically, it contends that although the word "device" does appear in the claims, it only appears in conjunction with other terms, i.e. "integrated circuit device," "memory device," and "synchronous memory device." Rambus argues that it would be improper for the term "device" to be construed separately from the context in which it appears in the claims. Thus, Rambus argues that only "integrated circuit device," "memory device" and "synchronous memory device" should be construed. Rambus also submits that Hynix's proffered construction of "device" would read multiplexing into the claims, and that such a construction would be at odds with the Federal Circuit's decision.
The Federal Circuit reversed Infineon I's construction of "bus" to mean "a multiplexed set of signal lines used to transmit address, data and control information." Infineon II, 318 F.3d at 1094.*fn7 The district court held that the patentees acted as their own lexicographer by redefining "bus" to mean a "multiplexed bus." When the Federal Circuit overturned this construction, it noted that "[t]he claims do not specify that the bus multiplexes address, data and control information. See '918 patent, col. 26, ll. 19-27. Nothing in the claims compels a definition different from the ordinary meaning of 'bus.'" Id.
The Federal Circuit acknowledged that the Summary of the Invention and Detailed Description in the specification supported an inference that "bus" was limited to a multiplexing bus, but went on to note that "the remainder of the specification and prosecution history shows that Rambus did not clearly disclaim or disavow such claim scope in this case." Infineon II, 318 F.3d at 1094-95 (citing Inverness Med. Switz. GmbH v. Princeton Biomeditech Corp., 309 F.3d 1365, 1372 (Fed. Cir. 2002) (statements made during prosecution not clear and unambiguous disclaimer of claim scope)). The Federal Circuit found that multiplexing was not a requirement in all of Rambus's claims. Specifically, at least two original claims of the '898 application recite a multiplexed bus, while others do not.*fn8 In addition, the court of appeals reasoned that Rambus distinguished certain claims as reciting a multiplexed bus because Rambus viewed "bus" as having its ordinary meaning. "Indeed, it is because Rambus viewed 'bus' under its ordinary meaning that Rambus specified - in the claim language - that the inventive multiplexing bus carries substantially all address, data, and control information and that the bus operates without the need for device-select lines." Id. at 1095.
The Federal Circuit also noted that, in prosecuting the claims of U.S. Patent No. 5,841,580 ("the '580 patent"), the parent of the '263 patent, "the PTO issued a two-way restriction, dividing the claims into two distinct groups: a multiplexing bus group (Group I) and a latency invention group (Group II)." Id. at 1095. "Rambus elected to prosecute the latency claims from Group II in the '580 patent. Therefore, the claims of the '580 patent do not require a multiplexing bus." Id. As the claims of the '580 patent recite a bus, the court of appeals concluded that the PTO understood that "bus" was not limited to a multiplexing bus. Id. "The specification and prosecution histories, taken in their entirety, convince this court that Rambus did not redefine 'bus' to be a multiplexing bus in the patents-in-suit." Id. "[T]he term 'bus' carries its ordinary meaning as a set of signal lines to which a number of devices are connected, and over which information is transferred between devices." Id. at 1095.
Here, rather than applying a multiplexing limitation to the bus, Hynix asserts that multiplexing should limit the term "device." It remains unclear how "[e]lectronic circuits or components physically connected in a unit, with an interface to a bus having a multiplexed set of signal lines" is materially different from limiting the term "bus" to a "multiplexed bus." Although the focus is on the memory chip itself rather than its operational means of connection to the bus, the end result remains the same - the bus upon which the devices reside in the patents at issue would necessarily be a multiplexed bus. This end result, a multiplexed bus as part of the claim limitations, was rejected by the Federal Circuit.
Hynix relies on the Summary of the Invention, the Detailed Description, and the recitation of the objects of the invention in support of its contention that Rambus has acted as its own lexicographer in defining "device." This is largely the same material in the specification that the Federal Circuit found inadequate to support the multiplexing limitation on the term "bus." See Infineon II, 318 F.3d at 1094-95. In addition, U.S. Patent No. 6,101,152 ("the '152 patent") descends from the same '580 patent that does not require a multiplexing bus. The court, therefore, does not read a multiplexed bus limitation into the term "device." "Device" must be construed in the context of "integrated circuit device," "memory device," or "synchronous memory device."
2. Integrated Circuit Device
a. Proposed constructions
Rambus requests that this court adopt the Federal Circuit's construction of "integrated circuit device," as "a circuit constructed on a single monolithic substrate, commonly called a 'chip.'" CC Br. at 14; Infineon II, 318 F.3d at 1091. Hynix proposes that "integrated circuit device" be construed as "a device that includes one or more integrated circuits."
The district court in Infineon I construed "integrated circuit device" in the related U.S. Patent No. 5,954,804 ("the '804 patent) as requiring "a device ID register, interface circuitry and comparison circuitry." 2001 WL 34138091 at *28. Hynix contends that the Federal Circuit's construction of integrated circuit device was dictum not essential to its decision. Specifically, Hynix argues that here, limiting integrated circuit device as including an "identification register" is not at issue.
The Federal Circuit examined the language of claim 26 of the '804 patent*fn9 and found that the claim language did not support the district court's construction, noting that the terms "comparison circuitry" and "device identification register" do not appear anywhere in the text of the claim. Infineon II, 318 F.3d at 1089. The Federal Circuit also noted that there was "no justification for reading unstated limitations into claim 26," and construed "integrated circuit device" to have its ordinary meaning to one of skill in the art -"a circuit constructed on a single monolithic substrate, commonly called a 'chip.'" Id. at 1090-91 (citing Rambus, Inc. v. Infineon Techs. AG, No. 3:00cv524, slip op. at 70 (E.D. Va. 2001)); cf. THE NEW IEEE STANDARD DICTIONARY OF ELECTRICAL AND ELECTRONIC TERMS 662 (5th ed.1993); IBM DICTIONARY OF COMPUTING 347 (10th ed.1994); see also Tex. Digital, 308 F.3d at 1202 ("unless compelled otherwise, a court will give a claim term the full range of its ordinary meaning as understood by persons skilled in the relevant art."). Even assuming that the Federal Circuit's construction is dicta, the Federal Circuit's reasoning remains applicable to the present matter, and the reasoning is persuasive. The court, as urged by Rambus, construes "integrated circuit device" as "a circuit constructed on a single monolithic substrate, commonly called a 'chip.'"
3. Synchronous Memory Device
a. Proposed constructions
Hynix argues that "synchronous memory device" should be construed to mean "a memory device in which an external clock is used for timing purposes." Rambus counters that the term should be construed as "a memory device in which address, input data and control signals are recognized and output data signals are transferred in response to an external clock." The parties agree that a "synchronous" memory device is one in which at least some operations are synchronous with respect to an external clock. See, e.g., Hynix's Resp. CC Br. at 12. The parties disagree, however, over whether "synchronous" requires that all operations on the memory device be timed with respect to an external clock, or whether some operations on the memory device can be "asynchronous" while executing other operations as "synchronous."*fn10
As noted during the tutorial, DRAM in the early 1990's were asynchronous, although not called such, until the advent of Synchronous DRAM. Thus, the development and meaning of "Synchronous DRAM" is a relatively recent phenomenon.
11 of the 15 patents in suit have claims reciting the limitation "synchronous memory device." Claim 1 and asserted claim 2 of the '263 patent, for instance, recite:
1. A synchronous semiconductor memory device having at least one memory section which includes a plurality of memory cells, the memory device comprises:
a programmable register to store a value which is representative of a delay time after which the memory device responds to a read request.
2. The synchronous memory device of claim 1 further including output drivers, coupled to an external bus, to output data on the bus, in response to the read request, synchronously with respect to an external clock.
Although claiming a "synchronous memory device," nothing in the text of claim 1, upon which claim 2 depends, excludes some asynchronous operations. In addition, claim 1 does not explicitly require that address, input data and control signals be provided synchronously. Notably, claim 1 uses the term "comprises" in describing a memory device with a programmable register, thus apparently not closing the claim to asynchronous elements. See Moleculon Research Corp. v. CBS, Inc., 793 F.2d 1261, 1271 (Fed. Cir. 1986) ("The term 'comprising' denotes a patent claim as being 'open,' meaning that the recitation of structure in the claim is open to additional structural elements not explicitly mentioned."); M.P.E.P. § 2173.05(h) (6th Ed. 1996); see also '152 patent, cl. 11. c. Ordinary meaning
Hynix offers definitions of "synchronous" from two dictionaries. Webster's Ninth New Collegiate Dictionary (2d ed. 1989) defines synchronous as:
1: happening, existing, or arising at precisely the same time; 2: recurring or operating at exactly the same periods; . . . 4a: having the same period; also: having the same period and phase. The Oxford English Dictionary (2d ed. 1989) defines synchronous as:
1.a. Existing or happening at the same time; coincident in time; belonging to the same period, or occurring at the same moment, of time; contemporary; simultaneous . . .; b. . . . Relating to or treating of different events or things belonging to the same time or period; ...